1. Field of the Invention
Exemplary embodiments of the present invention relate to a display apparatus driving circuit that may be formed in a smaller area using fewer conductive lines.
2. Discussion of the Background
A display device, such as a liquid crystal display (LCD) device, an organic light emitting display (OLED) device, an electro-phoretic display (EPD) device, etc., includes driving circuits that provide signals used to generate visible images. The visible images are typically generated with, for example, multiple pixels that are disposed in a display region of the display device.
The driving circuits and the display region may both be formed on the same substrate (e.g., a display substrate). Alternatively, the driving circuits may be formed, for example, on a printed circuit board and coupled to the display substrate using a connector. By forming the driving circuit on the display substrate, however, the display device may be made smaller.
A display device, such as an LCD device, includes gate lines and data lines that traverse the display region. Points where the gate lines and data lines cross each other correspond to pixels. Signals applied to the gate lines and data lines determine whether the corresponding pixels emit light, as well the intensity of the light. The driving circuits for the gate lines and data lines may be disposed in the display substrate's peripheral area, which is outside the display region. For example, a gate driving circuit, which applies gate signals to the gate lines, may be formed in the peripheral area of the display substrate. This configuration may improve manufacturing productivity of the display device.
A typical gate driving circuit includes a shift register circuit that includes multiple shift register stages cascade connected to one another. U.S. Patent Application Publication No. 2007/0274433 discloses a conventional shift register circuit. Each stage of the shift register circuit may have the same structure as the other stages. See, for example, the stages SR of FIG. 12 of U.S. Patent Application Publication No. 2007/0274433. Furthermore, signal lines are included to provide signals, such as voltage and clock signals, to the stages. In a typical gate driver, each signal line is individually connected to each stage. For example, referring to FIG. 12 of U.S. Patent Application Publication No. 2007/0274433, each stage SR receives two clock signals CLK1 and CLK2 and two voltage signals Vr and Vn. As FIG. 12 shows, each of these four signals is provided individually to each stage SR by a connection line.